Logic gates & translating circuits
Each gate is one Boolean operation: AND is ·, OR is +, NOT is ′, and XOR is x′y + xy′. Translating a circuit means labelling the output of every gate with an expression and working left to right; translating back means building the expression tree as a network. Minimising the algebra first is what reduces gate count, which is why simplification matters commercially.
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Method: how to approach it
The order below is what examiners expect to see, and each step carries its own marks.
- Label the inputsName every primary input, then work forward through the gates.
- Annotate each gate outputWrite the expression at each gate’s output wire. The circuit output is then read off directly.
- Simplify before rebuildingMinimise algebraically or with a K-map, then draw the circuit for the reduced expression.
- Count gates and inputsCost is usually measured in gate count and total gate inputs. State which you are reporting.
Worked example
A circuit ANDs x with y′, ANDs x′ with y, then ORs the two results. Give its expression and identify the function.
- First AND gate output: x·y′.
- Second AND gate output: x′·y.
- OR gate output: xy′ + x′y.
- This is 1 exactly when x and y differ.
Answer. xy′ + x′y — the exclusive-or function, implemented here with two NOTs, two ANDs and one OR.
Where marks get dropped
These are the specific errors that cost credit on logic gates & translating circuits questions — QED's rubric penalises each of them separately.
- Reading a circuit right to left. Signals flow from inputs to output, so annotate in that direction.
- Forgetting inverters on the inputs when counting gates. Each NOT is a gate.
- Assuming fewer terms means fewer gates. A term with many literals needs a wide AND gate, so gate-input count often matters more.
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Logic gates & translating circuits — frequently asked questions
Why minimise a circuit?
Fewer gates means less silicon area, lower power and shorter propagation delay. In practice tools optimise for a mix of these, not purely for literal count.
How is XOR built from basic gates?
As xy′ + x′y with two ANDs, one OR and two NOTs, or more compactly with four NAND gates — which is how it is usually fabricated.
What is propagation delay?
The time for a change at the inputs to reach the output, roughly proportional to the depth of the circuit. A two-level SOP implementation minimises depth at the cost of gate width.
The rest of Boolean Algebra
Axioms, laws, simplification and Boolean functions. Each subtopic below has its own method, worked example and mark-losing traps.
- 1Boolean axioms & laws
- 2The duality principle
- 3Simplifying Boolean expressions
- 4Boolean functions & truth tables
- 5Boolean algebra, logic & set algebra
- 6Sum-of-products & product-of-sums
- 7Karnaugh maps & minimal expressions
- 8Logic gates & translating circuits
- 9NAND / NOR universality
- 10Don’t-care conditions in minimisation
- 11Quine–McCluskey minimisation
- 12Half adders, full adders & multiplexers
- 13Shannon expansion & binary decision diagrams
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